FAQ

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Sales & Support

  • Q1Is the S1D13700 forward-compatible with the S1D13305?
  • AThere are additional functions such as embedded SRAM and some functional limitation. For more information, please refer to the comparison table attached.

    S1D13700 - S1D13305 comparison table PDF (47KB)

  • Q2What are the precautions to upgrade from the S1D13305?
  • ARefer to the attached table.
    Clock specifications
    S1D13305 Supports crystal oscillator only.
    FPSHIFT is fixed at four divisions for the system clock.
    S1D13700 Crystal oscillator and clock waveform input are selectable.
    (Unused clock input pin must always be fixed to GND.)
    FPSHIFT is selection between 4/8/16 divisions.
    Host interface
    The clock to access is required or not.
    S1D13305 Clock input not required.
    S1D13700 Clock input required.
    Deleted functions
    M1 function If M1 function is used with the S1D13305,
    the software should invert the character code bit6 (D6).

    0000 (0h) --> 0100 (4h) 0001 (1h) --> 0101 (5h)
    0010 (2h) --> 0110 (6h) 0011 (3h) --> 0111 (7h)
    0100 (4h) --> 0000 (0h) 0101 (5h) --> 0001 (1h)
    0110 (6h) --> 0010 (2h) 0111 (7h) --> 0011 (3h)
    1000 (8h) --> 1100 (Ch) 1001 (9h) --> 1101 (Dh)
    1010 (Ah) --> 1110 (Eh) 1011 (Bh) --> 1111 (Fh)
    1100 (Ch) --> 1000 (8h) 1101 (Dh) --> 1001 (9h)
    1110 (Eh) --> 1010 (Ah) 1111 (Fh) --> 1011 (Bh)
    Status flag Since the S1D13700 has no restrictions for memory writing ,
    the status flag function indicating the non-display period is deleted.
    If the status flag read sequence is used, this processing should be deleted.
    Added functions
      Only the GRAY SCALE command (60h) is added.
    No need to set this command in case of 1 bpp display.
  • Q3Is it possible to upgrade from the S1D13700F00/F01 to the S1D13700F02?
  • AThe S1D13700 is forward-compatible, allowing simple upgrading. Please refer to the appendix document for detailed information on differences.

    Replacement with backward-compatible S1D13700-series models PDF (51KB)

    Errata No.X42A-P-001-01 PDF (155KB)

    Errata No.X42A-P-002-01 PDF (27KB)

  • Q4Are there any precautions apply for turning power on/off?
  • AEpson recommends power on/off in the following sequence:
    Turning on: COREVDD (internal) -> NIOVDD/HIOVDD (I/O unit) -> Signal input active
    Turning off: Signal input active -> NIOVDD/HIOVDD (I/O unit) -> COREVDD (internal)

    Make sure not to apply voltage to only COREVDD or only NIOVDD/HIOVDD more than one second.

  • Q5What's the minimum operating frequency?
  • AThe operating frequency depends on the panel clock frequency (FPSHIFT). The minimum operating frequency is four times the FPSHIFT value.
  • Q6Is it OK to remain the CS# signal in asserting when the host is accessing continuously?
  • AYes. It is no problems to remain the CS# signal in the asserting on either reading or writing.
  • Q7Do I need to do anything with unused address buses (AB[15:1]) in indirect mode?
  • AUnused address buses should be connected to GND. AB[15:1] is ignored during the operation with CPU address bus connection, so operations are not affected.
  • Q8Is it possible to connect to a CPU without a WAIT input?
  • AYes. Remain the WAIT# signal open.
    Please check first the AC timing (with no WAIT) in the development specifications manual before the trial to connect.
    But, it leads to drop in the performance, comparing to the case to use WAIT# signal, because the access cycle required to be pegged to satisfy the AC timing maximum length.
  • Q9Are there any precautions apply for initializing?
  • APlease be sure to follow the sequence below:
      <<When using CLKI>>
    Power on *(No particular time stipulation)
    Reset On *(t2: Min 1 ms wait) ... Internal state initialization time
    Reset Off *(t1: Min 3 ms wait) ... Stabilization time
    System Set
    		 System P1
    System P2
    Display RAM area initialization
      <<When using XCG/XCD>>
    Power on *(No particular time stipulation)
    Reset On *(t2: Min 1 ms wait) ... Internal state initialization time
    Reset Off System SET ... Power off cancel 1
    System P1 ... Power off cancel 2
    *(t1: Min 3 ms wait) ... Internal oscillation stabilization time
    System Set
    		 System P1
    System P2
    Display RAM area initialization
  • Q10How do I cancel Sleep?
  • AThe method for canceling Sleep differs between Direct and Indirect modes. Refer to the reference material provided for more information.

    S1D13700 required procedure after power on PDF (53KB)

  • Q11Show the setting values of the command?
  • AUtility software for the initial settings is provided as the support tools. The software is available at the URL below.

    https://global.epson.com/products_and_drivers/semicon/products/display_controllers/detail/s1d13700.html

  • Q12How do I set commands in Indirect mode?
  • ACommands must be set since the address bus is not used. Set the parameters in the proper sequence after setting the commands. Refer to the reference material provided for detailed information on the correspondence between parameters and addresses.

    Correspondence between parameters and addresses PDF (63KB)

  • Q13How many shades of gray can be displayed?
  • AYou can select to display 4 or 16 shades of gray. Gray scale is achieved using FRM (frame rate modulation).
  • Q14Is there any way not to display data which is currently writing?
  • AYou can hide the data which is currently writing by switching reading and writing areas in internal SRAM.
  • Q15Is there any way not to display the cursor?
  • AYes. There are two ways below:
    1. Set the cursor to Off (Disable) after refreshing the display data.
    2. Set the cursor address outside the associated layer.

    The associated layer is layer 1in case of double layer and layer 3 in case of triple layers.

  • Q16How much power does this device consume?
  • APower consumption varies with operating conditions. Refer to the reference material provided, which shows power consumption figures under typical operating conditions.

    Power estimation guidelines PDF (214KB)

  • Q17Are any reference circuit diagrams or component lists provided for board design?
  • ASee the S1D13700 Evaluation Board User Manual provided.

    https://global.epson.com/products_and_drivers/semicon/products/display_controllers/detail/s1d13700.html

  • Q18Do you offer an IBIS model?
  • AA. Two different IBIS models are available.
    d13700_5.ibs: HOST I/F circuit pin power supply voltage = 5V, LCD I/F circuit pin power supply voltage = 5V
    d13700_3.ibs: HOST I/F circuit pin power supply voltage = 3.3V, LCD I/F circuit pin power supply voltage = 3.3V

    S1D13700 IBIS model ZIP (117KB)

  • Q19Do you offer related software or device drivers?
  • ARelated software and device drivers are available at the URL below.

    https://global.epson.com/products_and_drivers/semicon/products/display_controllers/detail/s1d13700.html

  • Q20Who do I contact in the event the product fails to operate normally?
  • APlease contact your local Seiko Epson representative available at the Sales & Support page.

    Sales & Support